| 设备 |
描述 |
| AT40K05LV |
5K - 50K Gate FPGA with DSP Optimized Core
Cell and Distributed FreeRam. |
| AT40K10LV |
10K Gate FPGA with DSP Optimized Core Cell and
Distributed FreeRam (3.3V) |
| AT40K20LV |
20K Gate FPGA with DSP Optimized Core Cell and
Distributed FreeRam (3.3V) |
| AT40K40LV |
5K - 50K Gate FPGA with DSP Optimized Core
Cell and Distributed FreeRam (3.3V) |
| AT6002 |
AT6K FPGA ideal for use as re-configurable DSP
Co-processors (5V) |
| AT6002LV |
AT6K FPGA ideal for use as re-configurable DSP
Co-processors (3.3V) |
| AT6003 |
AT6K FPGA ideal for use as re-configurable DSP
Co-processors (5V) |
| AT6003LV |
AT6K FPGA ideal for use as re-configurable DSP
Co-processors (3.3V) |
| AT6005 |
AT6K FPGA ideal for use as re-configurable DSP
Co-processors (5V) |
| AT6005LV |
AT6K FPGA ideal for use as re-configurable DSP
Co-processors (3.3V) |
| AT6010 |
AT6K FPGA ideal for use as re-configurable DSP
Co-processors (5V) |
| AT6010LV |
AT6K FPGA ideal for use as re-configurable DSP
Co-processors (3.3V) |