ATtiny25单片机解密

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　　The ATtiny25 is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the ATtiny25 achieves throughputs approaching 1 MIPS per MHz allowing the system designer to optimize power consumption versus processing speed.
　　ATtiny25Features
　　High Performance, Low Power AVR? 8-Bit Microcontroller
　　Advanced RISC Architecture
　　– 120 Powerful Instructions – Most Single Clock Cycle Execution
　　– 32 x 8 General Purpose Working Registers
　　– Fully Static Operation
　　Non-volatile Program and Data Memories
　　– 2/4/8K Byte of In-System Programmable Program Memory Flash (ATtiny25/45/85)
　　Endurance: 10,000 Write/Erase Cycles
　　– 128/256/512 Bytes In-System Programmable EEPROM (ATtiny25/45/85)
　　Endurance: 100,000 Write/Erase Cycles
　　– 128/256/512 Bytes Internal SRAM (ATtiny25/45/85)
　　– Programming Lock for Self-Programming Flash Program and EEPROM Data Security
　　Peripheral Features
　　– 8-bit Timer/Counter with Prescaler and Two PWM Channels
　　– 8-bit High Speed Timer/Counter with Separate Prescaler
　　2 High Frequency PWM Outputs with Separate Output Compare Registers
　　Programmable Dead Time Generator
　　– Universal Serial Interface with Start Condition Detector
　　– 10-bit ADC
　　4 Single Ended Channels
　　2 Differential ADC Channel Pairs with Programmable Gain (1x, 20x)
　　– Programmable Watchdog Timer with Separate On-chip Oscillator
　　– On-chip Analog Comparator
　　Special Microcontroller Features
　　– debugWIRE On-chip Debug System
　　– In-System Programmable via SPI Port
　　– External and Internal Interrupt Sources
　　– Low Power Idle, ADC Noise Reduction, and Power-down Modes
　　– Enhanced Power-on Reset Circuit
　　– Programmable Brown-out Detection Circuit
　　– Internal Calibrated Oscillator
　　I/O and Packages
　　– Six Programmable I/O Lines
　　– 8-pin PDIP and 8-pin SOIC